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Home | Documentation | UML Classes

Latch

 Latch

Function

A level sensitive memory element.  The output is the same as the input when the enable is high, and is held at the value of the input when the enable goes low.

Comments

Timing analysis and predictability of latches are very difficult and unreliable, so their use in synthesizable designs is generally avoided.

Parameters

Name

Description

WIDTH

Width of the input D and output Y ports.

Tagged Values

Name

Variants

Clear

UnUsed, Async

Set

UnUsed, Async

Inputs

Name

Width

Condition

Description

D

WIDTH

None

 

Enable

 

None

 

AsyClear

 

Clear = Async

 

AsySet

 

Set = Async

 

 Outputs

Name

Width

Condition

Description

Y

WIDTH

 

 

 

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